Regviz

stm32 /stm32n6 /STM32N657 /DCMI /DCMI_SR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DCMI_SR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h5/STM32H523/DCMI/DCMI_SR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)HSYNC 0 (B_0x0)VSYNC 0 (B_0x0)FNE

FNE=B_0x0, HSYNC=B_0x0, VSYNC=B_0x0

Description

DCMI status register

Fields

HSYNC

Horizontal synchronization

0 (B_0x0): active line

1 (B_0x1): synchronization between lines
VSYNC

Vertical synchronization

0 (B_0x0): active frame

1 (B_0x1): synchronization between frames
FNE

FIFO not empty

0 (B_0x0): FIFO empty

1 (B_0x1): FIFO contains valid data.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32