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stm32 /stm32n6 /STM32N657 /DCMIPP /DCMIPP_P1CBPRCR

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Interpret as DCMIPP_P1CBPRCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)ENABLE 0 (B_0x0)STRENGTH

ENABLE=B_0x0, STRENGTH=B_0x0

Description

DCMIPP Pipe1 current bad pixel removal register

Fields

ENABLE

Current status of enable bit

0 (B_0x0): Bypass: bad pixel removal is not active, all pixels are transmitted through

1 (B_0x1): Enable: if bad pixel are detected, they are replaced by corrected pixels.
STRENGTH

Current strength (aggressiveness) of the bad pixel detection:

0 (B_0x0): the filter is fairly tolerant: only a few pixels are declared bad, due to their high noise.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32