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stm32 /stm32n6 /STM32N657 /DTS /DTS_TSCSDIFSMPLCLRR

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Interpret as DTS_TSCSDIFSMPLCLRR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SMPL_CNTER_CLEAR

SMPL_CNTER_CLEAR=B_0x0

Description

DTS TSC sample clear register

Fields

SMPL_CNTER_CLEAR

Sample counter clear bit

0 (B_0x0): Counter value not cleared

1 (B_0x1): Counter value cleared

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32