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stm32 /stm32n6 /STM32N657 /ETH /ETH_MACLCSR

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Interpret as ETH_MACLCSR

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https://regviz.com/r/stm32/stm32n6/STM32N645/ETH/ETH_MACLCSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TLPIEN)TLPIEN 0 (TLPIEX)TLPIEX 0 (RLPIEN)RLPIEN 0 (RLPIEX)RLPIEX 0 (TLPIST)TLPIST 0 (RLPIST)RLPIST 0 (LPIEN)LPIEN 0 (PLS)PLS 0 (PLSEN)PLSEN 0 (LPITXA)LPITXA 0 (LPITE)LPITE 0 (LPITCSE)LPITCSE

Description

LPI control and status register

Fields

TLPIEN

Transmit LPI Entry
TLPIEX

Transmit LPI Exit
RLPIEN

Receive LPI Entry
RLPIEX

Receive LPI Exit
TLPIST

Transmit LPI State
RLPIST

Receive LPI State
LPIEN

LPI Enable
PLS

PHY Link Status
PLSEN

PHY Link Status Enable
LPITXA

LPI Tx Automate
LPITE

LPI Timer Enable
LPITCSE

LPI Tx Clock Stop Enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32