Regviz

stm32 /stm32n6 /STM32N657 /ETH /ETH_MACRXTXSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ETH_MACRXTXSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/ETH/ETH_MACRXTXSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TJT)TJT 0 (NCARR)NCARR 0 (LCARR)LCARR 0 (EXDEF)EXDEF 0 (LCOL)LCOL 0 (EXCOL)EXCOL 0 (RWT)RWT

Description

Rx Tx status register

Fields

TJT

Transmit Jabber Timeout
NCARR

No Carrier
LCARR

Loss of Carrier
EXDEF

Excessive Deferral
LCOL

Late Collision
EXCOL

Excessive Collisions
RWT

Receive Watchdog Timeout

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32