Regviz

stm32 /stm32n6 /STM32N657 /ETH /ETH_MTLFPECSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ETH_MTLFPECSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/ETH/ETH_MTLFPECSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AFSZ 0PEC0 (B_0x0)HRS

HRS=B_0x0

Description

FPE Frame Preemption Control Status Register

Fields

AFSZ

Additional Fragment Size
PEC

Preemption Classification
HRS

Hold/Release Status

0 (B_0x0): Indicates a Set-and-Release-MAC operation was last executed and the pMAC is in Release State.

1 (B_0x1): Indicates a Set-and-Hold-MAC operation was last executed and the pMAC is in Hold State.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32