Regviz

stm32 /stm32n6 /STM32N657 /ETH /ETH_MTLISR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ETH_MTLISR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/ETH/ETH_MTLISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Q0IS)Q0IS 0 (Q1IS)Q1IS 0 (ESTIS)ESTIS

Description

Interrupt status Register

Fields

Q0IS

Queue 0 interrupt status
Q1IS

Queue 1 interrupt status
ESTIS

EST (TAS- 802.1Qbv) Interrupt Status

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32