Regviz

stm32 /stm32n6 /STM32N657 /ETH /ETH_MTLTXQ1UR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ETH_MTLTXQ1UR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/ETH/ETH_MTLTXQ1UR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0UFFRMCNT0 (UFCNTOVF)UFCNTOVF

Description

T1 queue 1 underflow register

Fields

UFFRMCNT

Underflow Packet Counter
UFCNTOVF

Overflow Bit for Underflow Packet Counter

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32