stm32 /stm32n6 /STM32N657 /FMC1 /FMC_SDSR

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Interpret as FMC_SDSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)RE 0 (B_0x0)MODES1 0 (B_0x0)MODES2 0 (B_0x0)CMDOK

CMDOK=B_0x0, MODES1=B_0x0, RE=B_0x0, MODES2=B_0x0

Description

SDRAM status register

Fields

RE

Refresh error flag

0 (B_0x0): No refresh error has been detected

1 (B_0x1): A refresh error has been detected

MODES1

Status Mode for SDRAM device 1

0 (B_0x0): Normal mode, devices are not in Self-refresh or power-down

1 (B_0x1): Self-refresh

2 (B_0x2): Power-down

MODES2

Status mode for SDRAM device 2

0 (B_0x0): Normal mode, devices are not in Self-refresh or power-down

1 (B_0x1): Self-refresh

2 (B_0x2): Power-down

CMDOK

Previous command status

0 (B_0x0): Command not complete

1 (B_0x1): Command complete in the SDRAM clock domain

Links

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