UT2=B_0x0, UDA=B_0x0, UT1=B_0x0, ULL=B_0x0, UB1=B_0x0, USA=B_0x0
GPDMA channel 4 linked-list address register
| LA | pointer (16-bit low-significant address) to the next linked-list data structure |
| ULL | Update GPDMA_CxLLR register from memory 0 (B_0x0): no GPDMA_CxLLR update 1 (B_0x1): GPDMA_CxLLR update |
| UDA | Update GPDMA_CxDAR register from memory 0 (B_0x0): no GPDMA_CxDAR update 1 (B_0x1): GPDMA_CxDAR update |
| USA | update GPDMA_CxSAR from memory 0 (B_0x0): no GPDMA_CxSAR update 1 (B_0x1): GPDMA_CxSAR update |
| UB1 | Update GPDMA_CxBR1 from memory 0 (B_0x0): no GPDMA_CxBR1 update from memory (GPDMA_CxBR1.BNDT[15:0] restored if any link transfer) 1 (B_0x1): GPDMA_CxBR1 update |
| UT2 | Update GPDMA_CxTR2 from memory 0 (B_0x0): no GPDMA_CxTR2 update 1 (B_0x1): GPDMA_CxTR2 update |
| UT1 | Update GPDMA_CxTR1 from memory 0 (B_0x0): no GPDMA_CxTR1 update 1 (B_0x1): GPDMA_CxTR1 update |