Regviz

stm32 /stm32n6 /STM32N657 /LPTIM1 /LPTIM1_ARR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LPTIM1_ARR

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https://regviz.com/r/stm32/stm32n6/STM32N645/LPTIM1/LPTIM1_ARR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ARR

Description

LPTIM1 autoreload register

Fields

ARR

Auto reload value

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32