stm32 /stm32n6 /STM32N657 /OTG1 /OTG_PCGCCTL

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Interpret as OTG_PCGCCTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (STPPCLK)STPPCLK 0 (GATEHCLK)GATEHCLK 0 (PHYSUSP)PHYSUSP 0 (ENL1GTG)ENL1GTG 0 (PHYSLEEP)PHYSLEEP 0 (SUSP)SUSP

Description

OTG power and clock gating control register

Fields

STPPCLK

Stop PHY clock

GATEHCLK

Gate HCLK

PHYSUSP

PHY suspended

ENL1GTG

Enable sleep clock gating

PHYSLEEP

PHY in Sleep

SUSP

Deep Sleep

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