stm32 /stm32n6 /STM32N657 /PWR /PWR_CR1

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Interpret as PWR_CR1

POPL=B_0x0, MODE_PDN=B_0x0, LPDS08V=B_0x0, SDEN=B_0x0

Description

PWR control register 1

Fields

SDEN	SMPS step-down converter enable 0 (B_0x0): SMPS step-down converter disabled 1 (B_0x1): SMPS step-down converter enabled (default)
MODE_PDN	Enables the pull down on output voltage during power-down mode 0 (B_0x0): Pull-down disabled. The output is in high impedance during the shutdown (default). 1 (B_0x1): Pull-down enabled
LPDS08V	SMPS low-power mode enable (SVOS high only) 0 (B_0x0): SMPS low-power mode disabled 1 (B_0x1): SMPS low-power mode enabled (high-efficiency mode) (default)
POPL	pwr_on pulse low configuration. 0 (B_0x0): No guaranteed minimum low time 1 (B_0x1): ~ 1 ms guaranteed minimum low time (1 x 32 LSI cycles) 2 (B_0x2): ~ 2 ms guaranteed minimum low time (2 x 32 LSI cycles) 31 (B_0x1F): ~ 31 ms guaranteed minimum low time (31 x 32 LSI cycles)

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