Regviz

stm32 /stm32n6 /STM32N657 /PWR /PWR_DBPCR

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Interpret as PWR_DBPCR

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https://regviz.com/r/stm32/stm32n6/STM32N645/PWR/PWR_DBPCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)DBP

DBP=B_0x0

Description

PWR disable backup protection control register

Fields

DBP

Disable backup domain write protection

0 (B_0x0): Write access to backup domain disabled

1 (B_0x1): Write access to backup domain enabled

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32