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stm32 /stm32n6 /STM32N657 /PWR /PWR_WKUPCR

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Interpret as PWR_WKUPCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)WKUPC1 0 (B_0x0)WKUPC2 0 (B_0x0)WKUPC3 0 (B_0x0)WKUPC4

WKUPC1=B_0x0, WKUPC3=B_0x0, WKUPC4=B_0x0, WKUPC2=B_0x0

Description

PWR wake-up clear register

Fields

WKUPC1

Clear wake-up flag for WKUP1 pin

0 (B_0x0): No effect

1 (B_0x1): Writing 1 clears WKUPF1 in PWR_WKUPSR.
WKUPC2

Clear wake-up flag for WKUP2 pin

0 (B_0x0): No effect

1 (B_0x1): Writing 1 clears WKUPF2 in PWR_WKUPSR.
WKUPC3

Clear wake-up flag for WKUP3 pin

0 (B_0x0): No effect

1 (B_0x1): Writing 1 clears WKUPF3 in PWR_WKUPSR.
WKUPC4

Clear wake-up flag for WKUP4 pin

0 (B_0x0): No effect

1 (B_0x1): Writing 1 clears WKUPF4 in PWR_WKUPSR.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32