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stm32 /stm32n6 /STM32N657 /RCC /RCC_AHB1RSTR

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Interpret as RCC_AHB1RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GPDMA1RST 0 (B_0x0)ADC12RST

GPDMA1RST=B_0x0, ADC12RST=B_0x0

Description

RCC AHB1 Reset register

Fields

GPDMA1RST

GPDMA1 reset

0 (B_0x0): GPDMA1 is not under reset (default after reset)

1 (B_0x1): GPDMA1 is under reset
ADC12RST

ADC12 reset

0 (B_0x0): ADC12 is not under reset (default after reset)

1 (B_0x1): ADC12 is under reset

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32