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stm32 /stm32n6 /STM32N657 /RCC /RCC_APB1HENCR

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Interpret as RCC_APB1HENCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MDIOSENC)MDIOSENC 0 (FDCANENC)FDCANENC 0 (UCPD1ENC)UCPD1ENC

Description

RCC APB1H enable register

Fields

MDIOSENC

MDIOS enable
FDCANENC

FDCAN enable
UCPD1ENC

UCPD1 enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32