stm32 /stm32n6 /STM32N657 /RCC /RCC_APB1LLPENCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_APB1LLPENCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2LPENC)TIM2LPENC 0 (TIM3LPENC)TIM3LPENC 0 (TIM4LPENC)TIM4LPENC 0 (TIM5LPENC)TIM5LPENC 0 (TIM6LPENC)TIM6LPENC 0 (TIM7LPENC)TIM7LPENC 0 (TIM12LPENC)TIM12LPENC 0 (TIM13LPENC)TIM13LPENC 0 (TIM14LPENC)TIM14LPENC 0 (LPTIM1LPENC)LPTIM1LPENC 0 (WWDGLPENC)WWDGLPENC 0 (TIM10LPENC)TIM10LPENC 0 (TIM11LPENC)TIM11LPENC 0 (SPI2LPENC)SPI2LPENC 0 (SPI3LPENC)SPI3LPENC 0 (SPDIFRX1LPENC)SPDIFRX1LPENC 0 (USART2LPENC)USART2LPENC 0 (USART3LPENC)USART3LPENC 0 (UART4LPENC)UART4LPENC 0 (UART5LPENC)UART5LPENC 0 (I2C1LPENC)I2C1LPENC 0 (I2C2LPENC)I2C2LPENC 0 (I2C3LPENC)I2C3LPENC 0 (I3C1LPENC)I3C1LPENC 0 (I3C2LPENC)I3C2LPENC 0 (UART7LPENC)UART7LPENC 0 (UART8LPENC)UART8LPENC

Description

RCC APB1L Sleep enable register

Fields

TIM2LPENC

TIM2 sleep enable

TIM3LPENC

TIM3 sleep enable

TIM4LPENC

TIM4 sleep enable

TIM5LPENC

TIM5 sleep enable

TIM6LPENC

TIM6 sleep enable

TIM7LPENC

TIM7 sleep enable

TIM12LPENC

TIM12 sleep enable

TIM13LPENC

TIM13 sleep enable

TIM14LPENC

TIM14 sleep enable

LPTIM1LPENC

LPTIM1 sleep enable

WWDGLPENC

WWDG sleep enable

TIM10LPENC

TIM10 sleep enable

TIM11LPENC

TIM11 sleep enable

SPI2LPENC

SPI2 sleep enable

SPI3LPENC

SPI3 sleep enable

SPDIFRX1LPENC

SPDIFRX1 sleep enable

USART2LPENC

USART2 sleep enable

USART3LPENC

USART3 sleep enable

UART4LPENC

UART4 sleep enable

UART5LPENC

UART5 sleep enable

I2C1LPENC

I2C1 sleep enable

I2C2LPENC

I2C2 sleep enable

I2C3LPENC

I2C3 sleep enable

I3C1LPENC

I3C1 sleep enable

I3C2LPENC

I3C2 sleep enable

UART7LPENC

UART7 sleep enable

UART8LPENC

UART8 sleep enable

Links

()