TIM16EN=B_0x0, SAI2EN=B_0x0, TIM17EN=B_0x0, SPI1EN=B_0x0, SAI1EN=B_0x0, TIM15EN=B_0x0, USART6EN=B_0x0, SPI4EN=B_0x0, TIM1EN=B_0x0, SPI5EN=B_0x0, USART1EN=B_0x0, TIM18EN=B_0x0, UART9EN=B_0x0, USART10EN=B_0x0, TIM8EN=B_0x0, TIM9EN=B_0x0
RCC APB2 enable register
| TIM1EN | TIM1 enable 0 (B_0x0): TIM1 is disabled (default after reset) 1 (B_0x1): TIM1 is enabled |
| TIM8EN | TIM8 enable 0 (B_0x0): TIM8 is disabled (default after reset) 1 (B_0x1): TIM8 is enabled |
| USART1EN | USART1 enable 0 (B_0x0): USART1 is disabled (default after reset) 1 (B_0x1): USART1 is enabled |
| USART6EN | USART6 enable 0 (B_0x0): USART6 is disabled (default after reset) 1 (B_0x1): USART6 is enabled |
| UART9EN | UART9 enable 0 (B_0x0): UART9 is disabled (default after reset) 1 (B_0x1): UART9 is enabled |
| USART10EN | USART10 enable 0 (B_0x0): USART10 is disabled (default after reset) 1 (B_0x1): USART10 is enabled |
| SPI1EN | SPI1 enable 0 (B_0x0): SPI1 is disabled (default after reset) 1 (B_0x1): SPI1 is enabled |
| SPI4EN | SPI4 enable 0 (B_0x0): SPI4 is disabled (default after reset) 1 (B_0x1): SPI4 is enabled |
| TIM18EN | TIM18 enable 0 (B_0x0): TIM18 is disabled (default after reset) 1 (B_0x1): TIM18 is enabled |
| TIM15EN | TIM15 enable 0 (B_0x0): TIM15 is disabled (default after reset) 1 (B_0x1): TIM15 is enabled |
| TIM16EN | TIM16 enable 0 (B_0x0): TIM16 is disabled (default after reset) 1 (B_0x1): TIM16 is enabled |
| TIM17EN | TIM17 enable 0 (B_0x0): TIM17 is disabled (default after reset) 1 (B_0x1): TIM17 is enabled |
| TIM9EN | TIM9 enable 0 (B_0x0): TIM9 is disabled (default after reset) 1 (B_0x1): TIM9 is enabled |
| SPI5EN | SPI5 enable 0 (B_0x0): SPI5 is disabled (default after reset) 1 (B_0x1): SPI5 is enabled |
| SAI1EN | SAI1 enable 0 (B_0x0): SAI1 is disabled (default after reset) 1 (B_0x1): SAI1 is enabled |
| SAI2EN | SAI2 enable 0 (B_0x0): SAI2 is disabled (default after reset) 1 (B_0x1): SAI2 is enabled |