RCC_CCIPR12

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Interpret as RCC_CCIPR12

LPTIM1SEL=B_0x0, LPTIM2SEL=B_0x0, LPTIM4SEL=B_0x0, LPTIM5SEL=B_0x0, LPTIM3SEL=B_0x0

Description

RCC clock configuration for independent peripheral register12

Fields

LPTIM1SEL	Source selection for the LPTIM1 kernel clock 0 (B_0x0): pclk1 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic15_ck selected as reference clock 3 (B_0x3): lse_ck selected as reference clock 4 (B_0x4): lsi_ck selected as reference clock 5 (B_0x5): timg_ck selected as reference clock
LPTIM2SEL	Source selection for the LPTIM2 kernel clock 0 (B_0x0): pclk4 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic15_ck selected as reference clock 3 (B_0x3): lse_ck selected as reference clock 4 (B_0x4): lsi_ck selected as reference clock 5 (B_0x5): timg_ck selected as reference clock
LPTIM3SEL	Source selection for the LPTIM3 kernel clock 0 (B_0x0): pclk4 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic15_ck selected as reference clock 3 (B_0x3): lse_ck selected as reference clock 4 (B_0x4): lsi_ck selected as reference clock 5 (B_0x5): timg_ck selected as reference clock
LPTIM4SEL	Source selection for the LPTIM4 kernel clock 0 (B_0x0): pclk4 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic15_ck selected as reference clock 3 (B_0x3): lse_ck selected as reference clock 4 (B_0x4): lsi_ck selected as reference clock 5 (B_0x5): timg_ck selected as reference clock
LPTIM5SEL	Source selection for the LPTIM5 kernel clock 0 (B_0x0): pclk4 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic15_ck selected as reference clock 3 (B_0x3): lse_ck selected as reference clock 4 (B_0x4): lsi_ck selected as reference clock 5 (B_0x5): timg_ck selected as reference clock

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