UART5SEL=B_0x0, UART7SEL=B_0x0, USART3SEL=B_0x0, UART8SEL=B_0x0, USART2SEL=B_0x0, USART6SEL=B_0x0, UART4SEL=B_0x0, USART1SEL=B_0x0
RCC clock configuration for independent peripheral register13
| USART1SEL | Source selection for the USART1 kernel clock 0 (B_0x0): pclk2 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |
| USART2SEL | Source selection for the USART2 kernel clock 0 (B_0x0): pclk1 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |
| USART3SEL | Source selection for the USART3 kernel clock 0 (B_0x0): pclk1 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |
| UART4SEL | Source selection for the UART4 kernel clock 0 (B_0x0): pclk1 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |
| UART5SEL | Source selection for the UART5 kernel clock 0 (B_0x0): pclk1 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |
| USART6SEL | Source selection for the USART6 kernel clock 0 (B_0x0): pclk2 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |
| UART7SEL | Source selection for the UART7 kernel clock 0 (B_0x0): pclk1 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |
| UART8SEL | Source selection for the UART8 kernel clock 0 (B_0x0): pclk1 selected as reference clock 1 (B_0x1): per_ck selected as reference clock 2 (B_0x2): ic9_ck selected as reference clock 3 (B_0x3): ic14_ck selected as reference clock 4 (B_0x4): lse_ck selected as reference clock 5 (B_0x5): msi_ck selected as reference clock 6 (B_0x6): hsi_div_ck selected as reference clock |