stm32 /stm32n6 /STM32N657 /RCC /RCC_CCIPR8

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_CCIPR8

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SDMMC1SEL 0 (B_0x0)SDMMC2SEL

SDMMC2SEL=B_0x0, SDMMC1SEL=B_0x0

Description

RCC clock configuration for independent peripheral register8

Fields

SDMMC1SEL

Source selection for the SDMMC1 kernel clock

0 (B_0x0): hclku selected as reference clock

1 (B_0x1): per_ck selected as reference clock

2 (B_0x2): ic4_ck selected as reference clock

3 (B_0x3): ic5_ck selected as reference clock

SDMMC2SEL

Source selection for the SDMMC2 kernel clock

0 (B_0x0): hclku selected as reference clock

1 (B_0x1): per_ck selected as reference clock

2 (B_0x2): ic4_ck selected as reference clock

3 (B_0x3): ic5_ck selected as reference clock

Links

()