Regviz

stm32 /stm32n6 /STM32N657 /RCC /RCC_MEMENSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_MEMENSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/RCC/RCC_MEMENSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (AXISRAM3ENS)AXISRAM3ENS 0 (AXISRAM4ENS)AXISRAM4ENS 0 (AXISRAM5ENS)AXISRAM5ENS 0 (AXISRAM6ENS)AXISRAM6ENS 0 (AHBSRAM1ENS)AHBSRAM1ENS 0 (AHBSRAM2ENS)AHBSRAM2ENS 0 (BKPSRAMENS)BKPSRAMENS 0 (AXISRAM1ENS)AXISRAM1ENS 0 (AXISRAM2ENS)AXISRAM2ENS 0 (FLEXRAMENS)FLEXRAMENS 0 (NPUCACHERAMENS)NPUCACHERAMENS 0 (VENCRAMENS)VENCRAMENS 0 (BOOTROMENS)BOOTROMENS

Description

RCC memory enable register

Fields

AXISRAM3ENS

AXISRAM3 enable
AXISRAM4ENS

AXISRAM4 enable
AXISRAM5ENS

AXISRAM5 enable
AXISRAM6ENS

AXISRAM6 enable
AHBSRAM1ENS

AHBSRAM1 enable
AHBSRAM2ENS

AHBSRAM2 enable
BKPSRAMENS

BKPSRAM enable
AXISRAM1ENS

AXISRAM1 enable
AXISRAM2ENS

AXISRAM2 enable
FLEXRAMENS

FLEXRAM enable
NPUCACHERAMENS

NPUCACHERAM enable
VENCRAMENS

VENCRAM enable
BOOTROMENS

BOOTROM enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32