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stm32 /stm32n6 /STM32N657 /RCC /RCC_MISCENCR

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Interpret as RCC_MISCENCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBGENC)DBGENC 0 (MCO1ENC)MCO1ENC 0 (MCO2ENC)MCO2ENC 0 (XSPIPHYCOMPENC)XSPIPHYCOMPENC 0 (PERENC)PERENC

Description

RCC miscellaneous enable register

Fields

DBGENC

DBG enable
MCO1ENC

MCO1 enable
MCO2ENC

MCO2 enable
XSPIPHYCOMPENC

XSPIPHYCOMP enable
PERENC

PER enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32