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stm32 /stm32n6 /STM32N657 /RCC /RCC_MISCLPENSR

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Interpret as RCC_MISCLPENSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBGLPENS)DBGLPENS 0 (XSPIPHYCOMPLPENS)XSPIPHYCOMPLPENS 0 (PERLPENS)PERLPENS

Description

RCC miscellaneous Sleep enable register

Fields

DBGLPENS

DBG sleep enable
XSPIPHYCOMPLPENS

XSPIPHYCOMP sleep enable
PERLPENS

PER sleep enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32