NPUCACHERAMPUB=B_0x0, AXISRAM1PUB=B_0x0, AXISRAM5PUB=B_0x0, AXISRAM6PUB=B_0x0, AXISRAM4PUB=B_0x0, AXISRAM3PUB=B_0x0, VENCRAMPUB=B_0x0, AXISRAM2PUB=B_0x0, BKPSRAMPUB=B_0x0, AHBSRAM1PUB=B_0x0, AHBSRAM2PUB=B_0x0, FLEXRAMPUB=B_0x0
RCC bus public configuration register4
| AXISRAM3PUB | Defines the public protection of the AXISRAM3 bus configuration bits. 0 (B_0x0): AXISRAM3 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AXISRAM3 configuration bits are accessible by public software only |
| AXISRAM4PUB | Defines the public protection of the AXISRAM4 bus configuration bits. 0 (B_0x0): AXISRAM4 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AXISRAM4 configuration bits are accessible by public software only |
| AXISRAM5PUB | Defines the public protection of the AXISRAM5 bus configuration bits. 0 (B_0x0): AXISRAM5 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AXISRAM5 configuration bits are accessible by public software only |
| AXISRAM6PUB | Defines the public protection of the AXISRAM6 bus configuration bits. 0 (B_0x0): AXISRAM6 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AXISRAM6 configuration bits are accessible by public software only |
| AHBSRAM1PUB | Defines the public protection of the AHBSRAM1 bus configuration bits. 0 (B_0x0): AHBSRAM1 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AHBSRAM1 configuration bits are accessible by public software only |
| AHBSRAM2PUB | Defines the public protection of the AHBSRAM2 bus configuration bits. 0 (B_0x0): AHBSRAM2 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AHBSRAM2 configuration bits are accessible by public software only |
| BKPSRAMPUB | Defines the public protection of the BKPSRAM bus configuration bits. 0 (B_0x0): BKPSRAM configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): BKPSRAM configuration bits are accessible by public software only |
| AXISRAM1PUB | Defines the public protection of the AXISRAM1 bus configuration bits. 0 (B_0x0): AXISRAM1 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AXISRAM1 configuration bits are accessible by public software only |
| AXISRAM2PUB | Defines the public protection of the AXISRAM2 bus configuration bits. 0 (B_0x0): AXISRAM2 configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): AXISRAM2 configuration bits are accessible by public software only |
| FLEXRAMPUB | Defines the public protection of the FLEXRAM bus configuration bits. 0 (B_0x0): FLEXRAM configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): FLEXRAM configuration bits are accessible by public software only |
| NPUCACHERAMPUB | Defines the public protection of the NPUCACHERAM bus configuration bits. 0 (B_0x0): NPUCACHERAM configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): NPUCACHERAM configuration bits are accessible by public software only |
| VENCRAMPUB | Defines the public protection of the VENCRAM bus configuration bits. 0 (B_0x0): VENCRAM configuration bits are accessible by non-public software only (default after reset) 1 (B_0x1): VENCRAM configuration bits are accessible by public software only |