PPEN58=B_0x0, PPEN39=B_0x0, PPEN48=B_0x0, PPEN47=B_0x0, PPEN57=B_0x0, PPEN35=B_0x0, PPEN43=B_0x0, PPEN34=B_0x0, PPEN59=B_0x0, PPEN53=B_0x0, PPEN55=B_0x0, PPEN54=B_0x0, PPEN37=B_0x0, PPEN45=B_0x0, PPEN56=B_0x0, PPEN50=B_0x0, PPEN62=B_0x0, PPEN36=B_0x0, PPEN32=B_0x0, PPEN52=B_0x0, PPEN44=B_0x0, PPEN42=B_0x0, PPEN63=B_0x0, PPEN51=B_0x0, PPEN61=B_0x0, PPEN49=B_0x0, PPEN46=B_0x0, PPEN41=B_0x0, PPEN40=B_0x0, PPEN33=B_0x0, PPEN60=B_0x0, PPEN38=B_0x0
RIFSC peripheral protection status register 1
| PPEN32 | peripheral protection enable 32 0 (B_0x0): SEC32, PRIV32, and RLOCK32 register bit not present. 1 (B_0x1): SEC32, PRIV32, and RLOCK32 register bit present. |
| PPEN33 | peripheral protection enable 33 0 (B_0x0): SEC33, PRIV33, and RLOCK33 register bit not present. 1 (B_0x1): SEC33, PRIV33, and RLOCK33 register bit present. |
| PPEN34 | peripheral protection enable 34 0 (B_0x0): SEC34, PRIV34, and RLOCK34 register bit not present. 1 (B_0x1): SEC34, PRIV34, and RLOCK34 register bit present. |
| PPEN35 | peripheral protection enable 35 0 (B_0x0): SEC35, PRIV35, and RLOCK35 register bit not present. 1 (B_0x1): SEC35, PRIV35, and RLOCK35 register bit present. |
| PPEN36 | peripheral protection enable 36 0 (B_0x0): SEC36, PRIV36, and RLOCK36 register bit not present. 1 (B_0x1): SEC36, PRIV36, and RLOCK36 register bit present. |
| PPEN37 | peripheral protection enable 37 0 (B_0x0): SEC37, PRIV37, and RLOCK37 register bit not present. 1 (B_0x1): SEC37, PRIV37, and RLOCK37 register bit present. |
| PPEN38 | peripheral protection enable 38 0 (B_0x0): SEC38, PRIV38, and RLOCK38 register bit not present. 1 (B_0x1): SEC38, PRIV38, and RLOCK38 register bit present. |
| PPEN39 | peripheral protection enable 39 0 (B_0x0): SEC39, PRIV39, and RLOCK39 register bit not present. 1 (B_0x1): SEC39, PRIV39, and RLOCK39 register bit present. |
| PPEN40 | peripheral protection enable 40 0 (B_0x0): SEC40, PRIV40, and RLOCK40 register bit not present. 1 (B_0x1): SEC40, PRIV40, and RLOCK40 register bit present. |
| PPEN41 | peripheral protection enable 41 0 (B_0x0): SEC41, PRIV41, and RLOCK41 register bit not present. 1 (B_0x1): SEC41, PRIV41, and RLOCK41 register bit present. |
| PPEN42 | peripheral protection enable 42 0 (B_0x0): SEC42, PRIV42, and RLOCK42 register bit not present. 1 (B_0x1): SEC42, PRIV42, and RLOCK42 register bit present. |
| PPEN43 | peripheral protection enable 43 0 (B_0x0): SEC43, PRIV43, and RLOCK43 register bit not present. 1 (B_0x1): SEC43, PRIV43, and RLOCK43 register bit present. |
| PPEN44 | peripheral protection enable 44 0 (B_0x0): SEC44, PRIV44, and RLOCK44 register bit not present. 1 (B_0x1): SEC44, PRIV44, and RLOCK44 register bit present. |
| PPEN45 | peripheral protection enable 45 0 (B_0x0): SEC45, PRIV45, and RLOCK45 register bit not present. 1 (B_0x1): SEC45, PRIV45, and RLOCK45 register bit present. |
| PPEN46 | peripheral protection enable 46 0 (B_0x0): SEC46, PRIV46, and RLOCK46 register bit not present. 1 (B_0x1): SEC46, PRIV46, and RLOCK46 register bit present. |
| PPEN47 | peripheral protection enable 47 0 (B_0x0): SEC47, PRIV47, and RLOCK47 register bit not present. 1 (B_0x1): SEC47, PRIV47, and RLOCK47 register bit present. |
| PPEN48 | peripheral protection enable 48 0 (B_0x0): SEC48, PRIV48, and RLOCK48 register bit not present. 1 (B_0x1): SEC48, PRIV48, and RLOCK48 register bit present. |
| PPEN49 | peripheral protection enable 49 0 (B_0x0): SEC49, PRIV49, and RLOCK49 register bit not present. 1 (B_0x1): SEC49, PRIV49, and RLOCK49 register bit present. |
| PPEN50 | peripheral protection enable 50 0 (B_0x0): SEC50, PRIV50, and RLOCK50 register bit not present. 1 (B_0x1): SEC50, PRIV50, and RLOCK50 register bit present. |
| PPEN51 | peripheral protection enable 51 0 (B_0x0): SEC51, PRIV51, and RLOCK51 register bit not present. 1 (B_0x1): SEC51, PRIV51, and RLOCK51 register bit present. |
| PPEN52 | peripheral protection enable 52 0 (B_0x0): SEC52, PRIV52, and RLOCK52 register bit not present. 1 (B_0x1): SEC52, PRIV52, and RLOCK52 register bit present. |
| PPEN53 | peripheral protection enable 53 0 (B_0x0): SEC53, PRIV53, and RLOCK53 register bit not present. 1 (B_0x1): SEC53, PRIV53, and RLOCK53 register bit present. |
| PPEN54 | peripheral protection enable 54 0 (B_0x0): SEC54, PRIV54, and RLOCK54 register bit not present. 1 (B_0x1): SEC54, PRIV54, and RLOCK54 register bit present. |
| PPEN55 | peripheral protection enable 55 0 (B_0x0): SEC55, PRIV55, and RLOCK55 register bit not present. 1 (B_0x1): SEC55, PRIV55, and RLOCK55 register bit present. |
| PPEN56 | peripheral protection enable 56 0 (B_0x0): SEC56, PRIV56, and RLOCK56 register bit not present. 1 (B_0x1): SEC56, PRIV56, and RLOCK56 register bit present. |
| PPEN57 | peripheral protection enable 57 0 (B_0x0): SEC57, PRIV57, and RLOCK57 register bit not present. 1 (B_0x1): SEC57, PRIV57, and RLOCK57 register bit present. |
| PPEN58 | peripheral protection enable 58 0 (B_0x0): SEC58, PRIV58, and RLOCK58 register bit not present. 1 (B_0x1): SEC58, PRIV58, and RLOCK58 register bit present. |
| PPEN59 | peripheral protection enable 59 0 (B_0x0): SEC59, PRIV59, and RLOCK59 register bit not present. 1 (B_0x1): SEC59, PRIV59, and RLOCK59 register bit present. |
| PPEN60 | peripheral protection enable 60 0 (B_0x0): SEC60, PRIV60, and RLOCK60 register bit not present. 1 (B_0x1): SEC60, PRIV60, and RLOCK60 register bit present. |
| PPEN61 | peripheral protection enable 61 0 (B_0x0): SEC61, PRIV61, and RLOCK61 register bit not present. 1 (B_0x1): SEC61, PRIV61, and RLOCK61 register bit present. |
| PPEN62 | peripheral protection enable 62 0 (B_0x0): SEC62, PRIV62, and RLOCK62 register bit not present. 1 (B_0x1): SEC62, PRIV62, and RLOCK62 register bit present. |
| PPEN63 | peripheral protection enable 63 0 (B_0x0): SEC63, PRIV63, and RLOCK63 register bit not present. 1 (B_0x1): SEC63, PRIV63, and RLOCK63 register bit present. |