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stm32 /stm32n6 /STM32N657 /SPDIFRX /SPDIFRX_FMT1_DR

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Interpret as SPDIFRX_FMT1_DR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PE)PE 0 (V)V0 (U)U0 (C)C0 (B_0x0)PT0DR

PT=B_0x0

Description

SPDIFRX data input register

Fields

PE

parity error bit
V

validity bit
U

user bit
C

channel Status bit
PT

preamble type

0 (B_0x0): not used

1 (B_0x1): preamble B received

2 (B_0x2): preamble M received

3 (B_0x3): preamble W received
DR

data value

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32