SYNCDIE=B_0x0, CSRNEIE=B_0x0, PERRIE=B_0x0, IFEIE=B_0x0, RXNEIE=B_0x0, OVRIE=B_0x0, SBLKIE=B_0x0
SPDIFRX interrupt mask register
| RXNEIE | RXNE interrupt enable 0 (B_0x0): Interrupt is inhibited. 1 (B_0x1): A SPDIFRX interface interrupt is generated whenever RXNE=1 in the SPDIFRX_SR register. |
| CSRNEIE | Control buffer ready interrupt enable 0 (B_0x0): Interrupt is inhibited. 1 (B_0x1): A SPDIFRX interface interrupt is generated whenever CSRNE = 1 in the SPDIFRX_SR register. |
| PERRIE | Parity error interrupt enable 0 (B_0x0): Interrupt is inhibited. 1 (B_0x1): A SPDIFRX interface interrupt is generated whenever PERR=1 in the SPDIFRX_SR register. |
| OVRIE | Overrun error interrupt enable 0 (B_0x0): Interrupt is inhibited. 1 (B_0x1): A SPDIFRX interface interrupt is generated whenever OVR=1 in the SPDIFRX_SR register. |
| SBLKIE | Synchronization block detected interrupt enable 0 (B_0x0): Interrupt is inhibited. 1 (B_0x1): A SPDIFRX interface interrupt is generated whenever SBD = 1 in the SPDIFRX_SR register. |
| SYNCDIE | Synchronization done 0 (B_0x0): Interrupt is inhibited. 1 (B_0x1): A SPDIFRX interface interrupt is generated whenever SYNCD = 1 in the SPDIFRX_SR register. |
| IFEIE | Serial interface error interrupt enable 0 (B_0x0): Interrupt is inhibited. 1 (B_0x1): A SPDIFRX interface interrupt is generated whenever SERR = 1, TERR = 1, or FERR = 1 in the SPDIFRX_SR register. |