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stm32 /stm32n6 /STM32N657 /SYSCFG /SYSCFG_VDDIO3CCSR

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Interpret as SYSCFG_VDDIO3CCSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ANSRC0APSRC0 (B_0x0)READY

READY=B_0x0

Description

SYSCFG VDDIO3 compensation cell status register

Fields

ANSRC

This value is provided by the cell, and can be used by the CPU to compute an I/O compensation cell code for NMOS transistors.
APSRC

This value is provided by the cell, and can be used by the CPU to compute an I/O compensation cell code for PMOS transistors.
READY

Provides the compensation cell status of I/Os supplied by VDDIOx

0 (B_0x0): VDDIOx I/O compensation cell not ready

1 (B_0x1): VDDIOx I/O compensation cell ready

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32