stm32 /stm32n6 /STM32N657 /TIM1 /TIM1_CCMR2_Input

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Interpret as TIM1_CCMR2_Input

31282724232019161512118743000000000000000000000000000000000000000000 (B_0x0)CC3S0IC3PSC0IC3F0 (B_0x0)CC4S0IC4PSC0IC4F

CC3S=B_0x0, CC4S=B_0x0

Description

TIM1 capture/compare mode register 2 [alternate]

Fields

CC3S

Capture/compare 3 selection

0 (B_0x0): CC3 channel is configured as output

1 (B_0x1): CC3 channel is configured as input, tim_ic3 is mapped on tim_ti3

2 (B_0x2): CC3 channel is configured as input, tim_ic3 is mapped on tim_ti4

3 (B_0x3): CC3 channel is configured as input, tim_ic3 is mapped on tim_trc. This mode is working only if an internal trigger input is selected through TS bit (TIMx_SMCR register)

IC3PSC

Input capture 3 prescaler

IC3F

Input capture 3 filter

CC4S

Capture/compare 4 selection

0 (B_0x0): CC4 channel is configured as output

1 (B_0x1): CC4 channel is configured as input, tim_ic4 is mapped on tim_ti4

2 (B_0x2): CC4 channel is configured as input, tim_ic4 is mapped on tim_ti3

3 (B_0x3): CC4 channel is configured as input, tim_ic4 is mapped on tim_trc. This mode is working only if an internal trigger input is selected through TS bit (TIMx_SMCR register)

IC4PSC

Input capture 4 prescaler

IC4F

Input capture 4 filter

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