Regviz

stm32 /stm32n6 /STM32N657 /VENC /VENC_SWREG60

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Interpret as VENC_SWREG60

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https://regviz.com/r/stm32/stm32n6/STM32N645/VENC/VENC_SWREG60#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SWREG_FIELD

Description

VENC 1st ROI area register

Fields

SWREG_FIELD

1st ROI area (all format mode)

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32