Regviz

stm32 /stm32u0 /STM32U083 /TAMP /TAMP_MISR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TAMP_MISR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32u0/STM32U031/TAMP/TAMP_MISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TAMP1MF)TAMP1MF 0 (TAMP2MF)TAMP2MF 0 (TAMP3MF)TAMP3MF 0 (TAMP4MF)TAMP4MF 0 (TAMP5MF)TAMP5MF 0 (ITAMP3MF)ITAMP3MF 0 (ITAMP4MF)ITAMP4MF 0 (ITAMP5MF)ITAMP5MF 0 (ITAMP6MF)ITAMP6MF

Description

TAMP masked interrupt status register

Fields

TAMP1MF

TAMP1 interrupt masked flag This flag is set by hardware when the tamper 1 interrupt is raised.
TAMP2MF

TAMP2 interrupt masked flag This flag is set by hardware when the tamper 2 interrupt is raised.
TAMP3MF

TAMP3 interrupt masked flag This flag is set by hardware when the tamper 3 interrupt is raised.
TAMP4MF

TAMP4 interrupt masked flag This flag is set by hardware when the tamper 4 interrupt is raised.
TAMP5MF

TAMP5 interrupt masked flag This flag is set by hardware when the tamper 5 interrupt is raised.
ITAMP3MF

Internal tamper 3 interrupt masked flag This flag is set by hardware when the internal tamper 3 interrupt is raised.
ITAMP4MF

Internal tamper 4 interrupt masked flag This flag is set by hardware when the internal tamper 4 interrupt is raised.
ITAMP5MF

Internal tamper 5 interrupt masked flag This flag is set by hardware when the internal tamper 5 interrupt is raised.
ITAMP6MF

Internal tamper 6 interrupt masked flag This flag is set by hardware when the internal tamper 6 interrupt is raised.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32