Regviz

stm32 /stm32u0 /STM32U083 /TIM2 /TIM2_CCR1

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Interpret as TIM2_CCR1

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https://regviz.com/r/stm32/stm32c0/STM32C071/TIM2/TIM2_CCR1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CCR1

Description

TIM2 capture/compare register 1

Fields

CCR1

Low Capture/Compare 1 value

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32