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stm32 /stm32u5 /STM32U545 /DAC1 /DAC_SHSR2

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Interpret as DAC_SHSR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TSAMPLE2

Description

DAC channel2 sample and hold sample time register

Fields

TSAMPLE2

DAC Channel 2 sample Time (only valid in sample and hold mode)

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32