Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32u5/STM32U535/GTZC2_TZSC/TZSC_CR#0x0
TZSC control register
lock the configuration of GTZC1_TZSC_SECCFGRx and GTZC1_TZSC_PRIVCFGRx registers until next reset
https://github.com/modm-io/cmsis-svd-stm32