ADF clock generator control register
| CKGDEN | CKGEN dividers enable |
| CCK0EN | ADF_CCK0 clock enable |
| CCK1EN | ADF_CCK1 clock enable |
| CKGMOD | Clock generator mode |
| CCK0DIR | ADF_CCK0 direction |
| CCK1DIR | ADF_CCK1 direction |
| TRGSENS | CKGEN trigger sensitivity selection |
| TRGSRC | Digital filter trigger signal selection |
| CCKDIV | Divider to control the ADF_CCK clock |
| PROCDIV | Divider to control the serial interface clock |
| CKGACTIVE | Clock generator active flag |