Regviz

stm32 /stm32u5 /STM32U585 /LPGPIO1 /LPGPIO_BSRR

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Interpret as LPGPIO_BSRR

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https://regviz.com/r/stm32/stm32u5/STM32U575/LPGPIO1/LPGPIO_BSRR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BSy0)BSy0 0 (BSy1)BSy1 0 (BSy2)BSy2 0 (BSy3)BSy3 0 (BSy4)BSy4 0 (BSy5)BSy5 0 (BSy6)BSy6 0 (BSy7)BSy7 0 (BSy8)BSy8 0 (BSy9)BSy9 0 (BSy10)BSy10 0 (BSy11)BSy11 0 (BSy12)BSy12 0 (BSy13)BSy13 0 (BSy14)BSy14 0 (BSy15)BSy15 0 (BRy16)BRy16 0 (BRy17)BRy17 0 (BRy18)BRy18 0 (BRy19)BRy19 0 (BRy20)BRy20 0 (BRy21)BRy21 0 (BRy22)BRy22 0 (BRy23)BRy23 0 (BRy24)BRy24 0 (BRy25)BRy25 0 (BRy26)BRy26 0 (BRy27)BRy27 0 (BRy28)BRy28 0 (BRy29)BRy29 0 (BRy30)BRy30 0 (BRy31)BRy31

Description

LPGPIO port bit set/reset register

Fields

BSy0

BSy0
BSy1

BSy1
BSy2

BSy2
BSy3

BSy3
BSy4

BSy4
BSy5

BSy5
BSy6

BSy6
BSy7

BSy7
BSy8

BSy8
BSy9

BSy9
BSy10

BSy10
BSy11

BSy11
BSy12

BSy12
BSy13

BSy13
BSy14

BSy14
BSy15

BSy15
BRy16

BRy16
BRy17

BRy17
BRy18

BRy18
BRy19

BRy19
BRy20

BRy20
BRy21

BRy21
BRy22

BRy22
BRy23

BRy23
BRy24

BRy24
BRy25

BRy25
BRy26

BRy26
BRy27

BRy27
BRy28

BRy28
BRy29

BRy29
BRy30

BRy30
BRy31

BRy31

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32