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stm32 /stm32u5 /STM32U585 /PWR /PWR_PUCRI

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Interpret as PWR_PUCRI

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PU0)PU0 0 (PU1)PU1 0 (PU2)PU2 0 (PU3)PU3 0 (PU4)PU4 0 (PU5)PU5 0 (PU6)PU6 0 (PU7)PU7

Description

PWR port I pull-up control register

Fields

PU0

Port I pull-up bit
PU1

Port I pull-up bit
PU2

Port I pull-up bit
PU3

Port I pull-up bit
PU4

Port I pull-up bit
PU5

Port I pull-up bit
PU6

Port I pull-up bit
PU7

Port I pull-up bit

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32