stm32 /stm32u5 /STM32U5A5 /OTG_HS /HAINTMSK

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Interpret as HAINTMSK

31282724232019161512118743000000000000000000000000000000000000000000HAINTM

Description

The host all channel interrupt mask register works with the host all channel interrupt register to interrupt the application when an event occurs on a channel. There is one interrupt mask bit per channel, up to a maximum of 16 bits.

Fields

HAINTM

HAINTM

Links

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