Regviz

stm32 /stm32u5 /STM32U5A9 /PSSI /ICR

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Interpret as ICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OVR_ISC)OVR_ISC

Description

PSSI interrupt clear register

Fields

OVR_ISC

OVR_ISC

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32