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stm32 /stm32u5 /STM32U5A9 /SPI1 /CR1

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Interpret as CR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SPE)SPE 0 (MASRX)MASRX 0 (CSTART)CSTART 0 (CSUSP)CSUSP 0 (HDDIR)HDDIR 0 (SSI)SSI 0 (CRC33_17)CRC33_17 0 (RCRCINI)RCRCINI 0 (TCRCINI)TCRCINI 0 (IOLOCK)IOLOCK

Description

control register 1

Fields

SPE

SPE
MASRX

MASRX
CSTART

CSTART
CSUSP

CSUSP
HDDIR

HDDIR
SSI

SSI
CRC33_17

CRC33_17
RCRCINI

RCRCINI
TCRCINI

TCRCINI
IOLOCK

IOLOCK

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32