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stm32 /stm32u5 /STM32U5Fx /ADF1 /ADF_DFLT0RSFR

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Interpret as ADF_DFLT0RSFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RSFLTBYP)RSFLTBYP 0 (RSFLTD)RSFLTD 0 (HPFBYP)HPFBYP 0HPFC

Description

ADF reshape filter configuration register 0

Fields

RSFLTBYP

Reshaper filter bypass
RSFLTD

Reshaper filter decimation ratio
HPFBYP

High-pass filter bypass
HPFC

High-pass filter cut-off frequency

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32