stm32 /stm32u5 /STM32U5Fx /LPTIM1 /ICR_output

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Interpret as ICR_output

31282724232019161512118743000000000000000000000000000000000000000000 (CC1IF)CC1IF0 (ARRMCF)ARRMCF0 (EXTTRIGCF)EXTTRIGCF0 (CMP1OKCF)CMP1OKCF0 (ARROKCF)ARROKCF0 (UPCF)UPCF0 (DOWNCF)DOWNCF0 (UECF)UECF0 (REPOKCF)REPOKCF0 (CC2CF)CC2CF0 (CMP2OKCF)CMP2OKCF0 (DIEROKCF)DIEROKCF

Description

Interrupt Clear Register (output mode)

Fields

CC1IF

Capture/compare 1 clear flag

ARRMCF

Autoreload match Clear Flag

EXTTRIGCF

External trigger valid edge Clear Flag

CMP1OKCF

Compare register 1 update OK Clear Flag

ARROKCF

Autoreload register update OK Clear Flag

UPCF

Direction change to UP Clear Flag

DOWNCF

Direction change to down Clear Flag

UECF

Update event clear flag

REPOKCF

Repetition register update OK clear flag

CC2CF

Capture/compare 2 clear flag

CMP2OKCF

Compare register 2 update OK clear flag

DIEROKCF

Interrupt enable register update OK clear flag

Links

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