Regviz

stm32 /stm32u5 /STM32U5Fx /PWR /PWR_PUCRJ

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Interpret as PWR_PUCRJ

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PU0)PU0 0 (PU1)PU1 0 (PU2)PU2 0 (PU3)PU3 0 (PU4)PU4 0 (PU5)PU5 0 (PU6)PU6 0 (PU7)PU7 0 (PU8)PU8 0 (PU9)PU9 0 (PU10)PU10 0 (PU11)PU11

Description

PWR port J pull-up control register

Fields

PU0
PU1
PU2
PU3
PU4
PU5
PU6
PU7
PU8
PU9
PU10
PU11

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32