Regviz

stm32 /stm32u5 /STM32U5Fx /TIM15 /AF1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as AF1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32u5/STM32U535/TIM16/AF1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BKINE)BKINE 0 (BKCMP1E)BKCMP1E 0 (BKCMP2E)BKCMP2E 0 (BKCMP3E)BKCMP3E 0 (BKCMP4E)BKCMP4E 0 (BKCMP5E)BKCMP5E 0 (BKCMP6E)BKCMP6E 0 (BKCMP7E)BKCMP7E 0 (BKINP)BKINP 0 (BKCMP1P)BKCMP1P 0 (BKCMP2P)BKCMP2P 0 (BKCMP3P)BKCMP3P 0 (BKCMP4P)BKCMP4P

Description

alternate function register 1

Fields

BKINE

TIMx_BKIN input enable
BKCMP1E

tim_brk_cmp1 enable
BKCMP2E

tim_brk_cmp2 enable
BKCMP3E

tim_brk_cmp3 enable
BKCMP4E

tim_brk_cmp4 enable
BKCMP5E

tim_brk_cmp5 enable
BKCMP6E

tim_brk_cmp6 enable
BKCMP7E

tim_brk_cmp7 enable
BKINP

TIMx_BKIN input polarity
BKCMP1P

tim_brk_cmp1 input polarity
BKCMP2P

tim_brk_cmp2 input polarity
BKCMP3P

tim_brk_cmp3 input polarity
BKCMP4P

tim_brk_cmp4 input polarity

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32