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stm32 /stm32u5 /STM32U5Gx /DCACHE1 /DCACHE_FCR

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Interpret as DCACHE_FCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CBSYENDF)CBSYENDF 0 (CERRF)CERRF 0 (CCMDENDF)CCMDENDF

Description

DCACHE flag clear register

Fields

CBSYENDF

CBSYENDF
CERRF

CERRF
CCMDENDF

CCMDENDF

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32