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stm32 /stm32u5 /STM32U5Gx /DSI /DSI_BCFGR

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Interpret as DSI_BCFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)PWRUP

PWRUP=B_0x0

Description

DSI bias configuration register

Fields

PWRUP

Power-up This bit powers-up the reference bias for the MIPI D-PHY

0 (B_0x0): Reference bias is powered down.

1 (B_0x1): Reference bias is powered up.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32