Regviz

stm32 /stm32u5 /STM32U5Gx /I2C1 /OAR2

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Interpret as OAR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OA20OA2MSK 0 (OA2EN)OA2EN

Description

Own address register 2

Fields

OA2

Interface address
OA2MSK

Own Address 2 masks
OA2EN

Own Address 2 enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32