Regviz

stm32 /stm32u5 /STM32U5Gx /RCC /RCC_CRRCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_CRRCR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32u5/STM32U535/RCC/RCC_CRRCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HSI48CAL

Description

RCC clock recovery RC register

Fields

HSI48CAL

HSI48 clock calibration These bits are initialized at startup with the factory-programmed HSI48 calibration trim value.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32